Process Integration Challenges in SOI Technology

Marina Gudinetsky, Towersemi, Migdal Haemek, Israel

In recent years, RF-SOI technology is a growing segment of RF industry due to an increasing demand for switch content in wireless applications, such as smart phone and tablet market. The use of SOI substrates is very attractive as their integration into a CMOS-based flow is simple, and does not require specialized equipment addition as in cases of GaAs or other. Nevertheless, there are some process challenges which are encountered due to specific properties of SOI wafers. The low oxygen content, which is needed for RF switches application, makes the wafer more sensitive to thermal processes characteristics, such as furnace ramp rates, loading temperature and total thermal budget. Also the silicon crown (non-SOI region at the edge of wafer), can lead to temperature imbalance between center and edge of wafer. Hence, SOI wafers are more vulnerable to wafer distortion.

In this study we show how to overcome impact of process conditions on SOI wafers and how to enable better SOI wafers manufacturing and control.